@Cursorkeys said:
Yep, these parts also have both an 8-bit wide 'NEG' and a 16-bit wide 'NEGW' instruction. The ref doc summary states they toggle the 7th or 15th bits on the target file register (sign bits here).
WTF? Sign-and-magnitude? WTF CPU is that?
For those who aren't up-to-speed on binary representations of signed numbers:
1's complement inverts all bits of a positive number to get its negative equivalent. It's simple to explain, but also causes there to be a negative zero as well as a positive zero, and is expensive to implement in hardware because of the need for "end around carry". It is rare, especially in new architectures.
2's complement is easy to implement in hardware because you can use very simple cascading add and subtract circuits without any need for anything like end around carry. -X is calculated as ~X+1, or more simply as 0-X. It has only one zero, and an extra most-negative value.
Sign-and-magnitude reserves one bit for the sign, and the only difference between X and -X is the value of this bit. This is arguably the simplest representation for us to understand as humans, because it is just like our way of writing down numbers. A hardware implementation, however, is horrible because of all the combinations of adding and subtracting positive and negative numbers, each of which needs to be routed to the correct order and operation, with the correct output value of the sign bit. For integer operations, sign-and-magnitude is tremendously rare, but most floating point systems, especially IEEE754, use it for the mantissa, but, curiously, not for the exponent.
So if the only difference between positive and negative on your machine is the sign bit, you've got something a little out of the ordinary.